1. Field of the Invention
The present invention relates generally to a semiconductor structure and fabrication method thereof, and more specifically, to a semiconductor structure and fabrication method thereof, including multi-layers of dielectric layer having a high dielectric constant with discontinuous boundaries.
2. Description of the Prior Art
Poly-silicon is conventionally used as a gate electrode in semiconductor devices, such as the metal-oxide-semiconductor (MOS). With the trend towards scaling down the size of semiconductor devices, conventional poly-silicon gates face problems such as inferior performance due to boron penetration and unavoidable depletion effect. This increases equivalent thickness of the gate dielectric layer, reduces gate capacitance, and worsens a driving force of the devices. Therefore, work function metals that are suitable for use as the high-K gate dielectric layer are used to replace the conventional poly-silicon gate to be the control electrode.
As the semiconductor process is miniaturized and the size of the semiconductor device shrinks, the thickness of the gate dielectric layer having a high dielectric constant needs to be thinner for achieving the desired performance. As the thickness of the gate dielectric layer decreases, however, leakage current of the gate increases. Therefore, methods for solving current leakage are needed in the industry that can reduce gate leakage current density (Jg) while maintaining equivalent oxide thickness (EOT) of the gate.